Invention Grant
- Patent Title: Memory control component with dynamic command/address signaling rate
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Application No.: US15798136Application Date: 2017-10-30
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Publication No.: US10170170B2Publication Date: 2019-01-01
- Inventor: Frederick A. Ware , Ely K. Tsern , Brian S. Leibowitz , Wayne Frederick Ellis , Akash Bansal , John Welsford Brooks , Kishore Ven Kasamsetty
- Applicant: Rambus Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Agent Charles Shemwell
- Main IPC: G11C8/18
- IPC: G11C8/18 ; G11C7/10 ; G11C5/02 ; G11C29/02 ; G06F13/16 ; G06F13/42 ; G11C5/04

Abstract:
In a multirank memory system in which the clock distribution trees of each rank are permitted to drift over a wide range (e.g., low power memory systems), the fine-interleaving of commands between ranks is facilitated through the use of techniques that cause each addressed rank to properly sample commands intended for that rank, notwithstanding the drift. The ability to perform such “microthreading” provides for substantially enhanced memory capacity without sacrificing the performance of single rank systems. This disclosure provides methods, memory controllers, memory devices and system designs adapted to these ends.
Public/Granted literature
- US20180122444A1 MEMORY CONTROL COMPONENT WITH DYNAMIC COMMAND/ADDRESS SIGNALING RATE Public/Granted day:2018-05-03
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