- Patent Title: Method for manufacturing semiconductor structure with multi spacers
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Application No.: US15896394Application Date: 2018-02-14
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Publication No.: US10096693B2Publication Date: 2018-10-09
- Inventor: Kuo-Cheng Ching , Ching-Wei Tsai , Chih-Hao Wang , Ying-Keung Leung
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/66 ; H01L29/78 ; H01L27/11 ; H01L27/02
Abstract:
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a fin structure formed over a substrate and a gate structure formed across the fin structure. The semiconductor structure further includes a bottom spacer formed on a lower part of a sidewall of the gate structure and an upper spacer formed on an upper part of the sidewall of the gate structure. In addition, the upper spacer includes an air gap formed in a dielectric material.
Public/Granted literature
- US20180175162A1 METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE WITH MULTI SPACERS Public/Granted day:2018-06-21
Information query
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