Invention Grant
- Patent Title: Method and apparatus for assembling and testing a multi-integrated circuit package
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Application No.: US15360187Application Date: 2016-11-23
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Publication No.: US10096502B2Publication Date: 2018-10-09
- Inventor: Gamal Refai-Ahmed , Suresh Ramalingam , Mohsen H. Mardi , Tien-Yu Lee , Ivor G. Barber , Cheang-Whang Chang , Jaspreet Singh Gandhi
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agent Robert M. Brush
- Main IPC: B23P21/00
- IPC: B23P21/00 ; H01L21/673 ; H01L21/67 ; H01L23/00 ; H01L23/31 ; H01L23/367 ; H01L21/48 ; H01L21/56
Abstract:
An example clamping assembly tray for packaging a semiconductor device includes a frame having a bottom surface and side walls extending from the bottom surface that define a cavity; and a compressible member disposed on the bottom surface of the frame within the cavity, where a top portion of the compressible member provides a support surface for supporting the semiconductor device, the support surface being between the bottom surface and a top edge of the side walls.
Public/Granted literature
- US20180144963A1 METHOD AND APPARATUS FOR ASSEMBLING AND TESTING A MULTI-INTEGRATED CIRCUIT PACKAGE Public/Granted day:2018-05-24
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