Invention Grant
- Patent Title: Data compaction and memory bandwidth reduction for sparse neural networks
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Application No.: US15422359Application Date: 2017-02-01
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Publication No.: US10096134B2Publication Date: 2018-10-09
- Inventor: Zhou Yan , Franciscus Wilhelmus Sijstermans , Yuanzhi Hua , Xiaojun Wang , Jeffrey Michael Pool , William J. Dally , Liang Chen
- Applicant: NVIDIA Corporation
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Zilka-Kotab, P.C.
- Main IPC: H03M7/00
- IPC: H03M7/00 ; G06T9/00 ; G06T1/20 ; G06T1/60

Abstract:
A method, computer program product, and system for sparse convolutional neural networks that improves efficiency is described. Multi-bit data for input to a processing element is received at a compaction engine. The multi-bit data is determined to equal zero and a single bit signal is transmitted from the memory interface to the processing element in lieu of the multi-bit data, where the single bit signal indicates that the multi-bit data equals zero. A compacted data sequence for input to a processing element is received by a memory interface. The compacted data sequence is transmitted from the memory interface to an expansion engine. Non-zero values are extracted from the compacted data sequence and zeros are inserted between the non-zero values by the expansion engine to generate an expanded data sequence that is output to the processing element.
Public/Granted literature
- US20180218518A1 DATA COMPACTION AND MEMORY BANDWIDTH REDUCTION FOR SPARSE NEURAL NETWORKS Public/Granted day:2018-08-02
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