Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US15462066Application Date: 2017-03-17
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Publication No.: US10090322B2Publication Date: 2018-10-02
- Inventor: Satoshi Shimamoto , Toshiyuki Kikuchi , Atsushi Moriya , Masanori Nakayama , Takashi Nakagawa
- Applicant: HITACHI KOKUSAI ELECTRIC INC.
- Applicant Address: JP Tokyo
- Assignee: HITACHI KOKUSAI ELECTRIC INC.
- Current Assignee: HITACHI KOKUSAI ELECTRIC INC.
- Current Assignee Address: JP Tokyo
- Agency: Volpe and Koenig, P.C.
- Priority: JP2017-002537 20170111
- Main IPC: H01L27/115
- IPC: H01L27/115 ; H01L27/11582 ; H01L27/1157 ; H01L21/66 ; H01L21/28 ; H01L21/02

Abstract:
A method of manufacturing a semiconductor device, includes: loading a substrate including a laminated film including an insulating film and a sacrificial film, a channel hole formed in the laminated film, a charge trapping film formed on a surface in the channel hole, a first channel film formed on a surface of the charge trapping film, and a common source line exposed on the bottom of the channel hole; receiving information on a distribution of hole diameter of the channel hole; and forming a second channel film on a surface of the first channel film by supplying a first processing gas and a second processing gas to a center side and an outer peripheral side of the substrate, respectively, so as to correct the distribution of the hole diameter based on the information.
Public/Granted literature
- US20180197877A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2018-07-12
Information query
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