Invention Grant
- Patent Title: Methods for preparing layered semiconductor structures
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Application No.: US15119304Application Date: 2015-01-09
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Publication No.: US10068795B2Publication Date: 2018-09-04
- Inventor: Michael J. Ries , Jeffrey Louis Libbert , Charles R. Lottes
- Applicant: SunEdison Semiconductor Limited (UEN201334164H)
- Applicant Address: TW Hsinchu
- Assignee: GlobalWafers Co., Ltd.
- Current Assignee: GlobalWafers Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Armstrong Teasdale LLP
- International Application: PCT/US2015/010759 WO 20150109
- International Announcement: WO2015/119742 WO 20150813
- Main IPC: H01L21/30
- IPC: H01L21/30 ; H01L21/46 ; H01L21/00 ; H01L21/762 ; H01L23/00 ; H01L21/04 ; H01L21/225 ; H01L21/265

Abstract:
Methods for preparing layered semiconductor structures are disclosed. The methods may involve pretreating an ion-implanted donor wafer by annealing the ion-implanted donor wafer to cause a portion of the ions to out-diffuse prior to wafer bonding. The donor structure may be bonded to a handle structure and cleaved without re-implanting ions into the donor structure.
Public/Granted literature
- US20170025307A1 METHODS FOR PREPARING LAYERED SEMICONDUCTOR STRUCTURES Public/Granted day:2017-01-26
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