Invention Grant
- Patent Title: Control system and method for cache coherency
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Application No.: US14740526Application Date: 2015-06-16
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Publication No.: US10044829B2Publication Date: 2018-08-07
- Inventor: Jiin Lai , Meng-Chen Yang
- Applicant: VIA Alliance Semiconductor Co., Ltd.
- Applicant Address: CN Shanghai
- Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Current Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Current Assignee Address: CN Shanghai
- Agency: McClure, Qualey & Rodack, LLP
- Priority: CN201410709312 20141128
- Main IPC: H04L29/08
- IPC: H04L29/08 ; G06F9/48 ; G06F12/08 ; G06F12/0813 ; G06F12/0815 ; G06F12/0842 ; G06F15/163

Abstract:
Control systems and methods for cache coherency are provided. One control method includes steps of transmitting a link-connect request to a second electrical device when the first electrical device is coupled to the second electrical device by a cache coherency (CC) interface by a first electrical device, establishing a link between the first electrical device and second electrical device according to the link-connect request by the CC interface, and operating a first operating system of the first electrical device by a second processing unit of the second electrical device after establishing the link.
Public/Granted literature
- US20160156734A1 CONTROL SYSTEM AND METHOD FOR CACHE COHERENCY Public/Granted day:2016-06-02
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