Invention Grant
- Patent Title: Dead time control circuit for a level shifter
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Application No.: US15842753Application Date: 2017-12-14
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Publication No.: US10044347B2Publication Date: 2018-08-07
- Inventor: Buddhika Abesingha , Merlin Green
- Applicant: pSemi Corporation
- Applicant Address: US CA San Diego
- Assignee: pSemi Corporation
- Current Assignee: pSemi Corporation
- Current Assignee Address: US CA San Diego
- Agency: Jaquez Land Greenhaus LLP
- Agent Martin J. Jaquez, Esq.; Alessandro Steinfl, Esq.
- Main IPC: H03K5/14
- IPC: H03K5/14 ; H02M1/38 ; H03K19/0185 ; H03K17/689 ; H02M7/538 ; H03K5/1534 ; H03K5/00

Abstract:
Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. Timing of control signals can be adjusted via internal and/or external components so as to minimize shoot trough currents in the high voltage devices. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.
Public/Granted literature
- US20180175841A1 Dead Time Control Circuit for a Level Shifter Public/Granted day:2018-06-21
Information query
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