Invention Grant
- Patent Title: Transistor and fabrication method thereof
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Application No.: US15097627Application Date: 2016-04-13
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Publication No.: US10043671B2Publication Date: 2018-08-07
- Inventor: Deyuan Xiao
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
- Applicant Address: CN Shanghai
- Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
- Current Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
- Current Assignee Address: CN Shanghai
- Agency: Anova Law Group, PLLC
- Priority: CN201510181550 20150416
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/285 ; H01L29/66 ; H01L29/16 ; H01L29/20

Abstract:
A junction-less transistor structure and fabrication method thereof are provided. The method includes providing a semiconductor substrate; and forming an epitaxial layer having a first surface and a second surface on the semiconductor substrate. The method also includes forming a plurality of trenches in the epitaxial layer from the first surface thereof; and forming a gate dielectric layer on side and bottom surfaces of the plurality of trenches. Further, the method includes forming a gate electrode layer on the gate dielectric layer and in the plurality of trenches; and forming an insulation layer on the gate electrode layer. Further, the method also includes forming a drain electrode layer on the first surface of the epitaxial layer; removing the semiconductor substrate; and forming a source electrode layer on the second surface of the epitaxial layer.
Public/Granted literature
- US20160308043A1 TRANSISTOR AND FABRICATION METHOD THEREOF Public/Granted day:2016-10-20
Information query
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