Invention Grant
- Patent Title: Nonvolatile semiconductor memory device
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Application No.: US15706250Application Date: 2017-09-15
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Publication No.: US10043579B2Publication Date: 2018-08-07
- Inventor: Yasuhiro Shiino , Eietsu Takahashi
- Applicant: TOSHIBA MEMORY CORPORATION
- Applicant Address: JP Minato-ku
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2009-214143 20090916; JP2010-028109 20100210
- Main IPC: G11C16/06
- IPC: G11C16/06 ; G11C16/04 ; G11C16/16 ; G11C16/10 ; G11C16/34 ; G11C16/08 ; G11C16/28 ; G11C16/14 ; G11C11/56

Abstract:
A nonvolatile semiconductor memory device includes a control circuit configured to control a soft program operation of setting nonvolatile memory cells to a first threshold voltage distribution state of the nonvolatile memory cells. When a characteristic of the nonvolatile memory cells is in a first state, the control circuit executes the soft program operation by applying a first voltage for setting the nonvolatile memory cells to the first threshold voltage distribution state to first word lines, and applying a second voltage higher than the first voltage to a second word line. When the characteristic of the nonvolatile memory cells is in a second state, the control circuit executes the soft program operation by applying a third voltage equal to or lower than the first voltage to the first word lines and applying a fourth voltage lower than the second voltage to the second word line.
Public/Granted literature
- US20180005695A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2018-01-04
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