Invention Grant
- Patent Title: 3D vertical NAND memory device including multiple select lines and control lines having different vertical spacing
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Application No.: US15278405Application Date: 2016-09-28
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Publication No.: US10042755B2Publication Date: 2018-08-07
- Inventor: Koji Sakui
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G11C16/08 ; G11C16/26 ; G11C16/10 ; G11C16/14 ; H01L27/115 ; H01L27/105 ; H01L27/11582

Abstract:
Some embodiments include apparatuses, and methods of forming and operating the apparatuses. Some of the apparatuses include a pillar including a length, a memory cell string and control lines located along a first segment of the pillar, and select lines located along a second segment of the pillar. The control lines include at least a first control line and a second control line. The first control line is adjacent the second control line. The first control line is separated from the second control line by a first distance in a direction of the length of the pillar. The select lines include at least a first select line and a second select line. The first select line is separated from the second select line by a second distance in the direction of the length of the pillar. The second distance is less than the first distance.
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