Invention Grant
- Patent Title: Level shifters, memory systems, and level shifting methods
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Application No.: US15144421Application Date: 2016-05-02
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Publication No.: US10014861B2Publication Date: 2018-07-03
- Inventor: Yogesh Luthra
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: G11C7/00
- IPC: G11C7/00 ; H03K19/00 ; H03K19/0185 ; G11C13/00 ; G11C5/14 ; G11C11/4074 ; G11C7/12 ; G11C7/10 ; G11C11/4093

Abstract:
Level shifters, memory systems, and level shifting methods are described. According to one arrangement, a level shifter includes an input configured to receive an input signal in a first voltage domain, an output configured to output an output signal from the level shifter in a second voltage domain different than the first voltage domain, a plurality of pull-down devices, and wherein one of the pull-down devices is coupled with the input and the output, a plurality of cross-coupled devices coupled with the pull-down devices and configured to provide transitions in the output signal as a result of transitions in the input signal, a plurality of current limiting devices coupled with the cross-coupled devices and configured to limit a flow of current from a source to the cross-coupled devices, and a plurality of dynamic devices configured to selectively provide charging current from the source to the cross-coupled devices.
Public/Granted literature
- US20160248424A1 Level Shifters, Memory Systems, and Level Shifting Methods Public/Granted day:2016-08-25
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