Invention Grant
- Patent Title: Methods for backup sequence using three transistor memory cell devices
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Application No.: US15675836Application Date: 2017-08-14
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Publication No.: US10014053B2Publication Date: 2018-07-03
- Inventor: Koji Sakui , Peter Feeley
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C16/04 ; G11C16/26
Abstract:
Methods for a backup sequence includes reading first data from a first data memory to a page buffer, copying the first data from the page buffer to a backup page comprising three transistor memory cell devices, erasing the first data memory, programming the first data from the page buffer to a second data memory, and erasing the backup page.
Public/Granted literature
- US20170345501A1 METHODS FOR BACKUP SEQUENCE USING THREE TRANSISTOR MEMORY CELL DEVICES Public/Granted day:2017-11-30
Information query
